论文发表

研究论文

以下论文整理自我的 Google Scholar 主页。

Someone^† 表示共同一作；Someone 表示通讯作者。

• [MICRO’26] Zengshi Wang, Zhuoyuan Yang, Wenbin Liao, Xin Yang, Xiaoyan Xiang, Jianyi Meng, 傅超, Jun Han. “SPMC: Speculative Multicast for GPU Address Translation Sharing”

• [TC’26] Zhiyuan Zhang, Jialin Liu, Zengshi Wang, Kanheng Jiang, 傅超, Jun Han. “Constructing Virtual FIFOs in CPU Cache Hierarchy for Software Data Plane Orchestration”

• [ISCA’26] 傅超^†, Jingyang Zheng^†, Xinliu He, Xiangqi Dong, Zheng Cao, Yuning Zhan, Wenzhong Bao, Peng Zhou, Jun Han. TDMSim: Enabling High-Density and Energy-Efficient GPU DRAM Caches with 2D-Materials for Data-Intensive Applications

• [TACO’25] Kanheng Jiang, Yongxin Lyu, Zhiyuan Zhang, Zengshi Wang, 傅超, Jun Han. “Thoth: Uncovering Data-Dependent Memory Access Patterns via Annotation-Directed Load Sampling”

• [MEJ’26] Kaixuan Wang, Jiang Wang, 傅超, Jun Han. “SAVP: Self-validating secure speculation via address-based value prediction”

• [DATE’26] Zengshi Wang, Zhiyuan Zhang, Zhuoyuan Yang, Kanheng Jiang, 傅超, Jun Han. “Khepri: Crystallizing TAGE for Memory Efficient Prewarm in Serverless Computing”

• [TCAD’26] 傅超, Li Wan, Yufan Jia, Zhiyuan Zhang, Kanheng Jiang, Jun Han. “Homonoia: Reinventing underutilized cross-level cache resource using reinforcement learning”

• [TCAD’25] Yufan Jia, Zhiyuan Zhang, 傅超, Li Wan, Jun Han. “PCMT: Prioritizing Coherence Message Types for NoC Protocol-level Deadlock Freedom”

• [ASICON’25] Jialin Liu, Zhiyuan Zhang, 傅超, Jun Han. “BIND: A Batch Cache-Invalidation Framework Based on Doorbell Mechanism”

• [FPL’24] 傅超, Zengshi Wang, Jun Han. “Chimera: A co-simulation framework combining with gem5 and FPGA platform for efficient verification”

• [TPDS’22] 傅超, Li Wan, Jun Han. “Losatm: A hardware transactional memory integrated with a low-overhead scenario-awareness conflict manager”

• [MEJ’21] 傅超, Yuchao Zhou, Jun Han. “A hardware-efficient dual-source data replication and local broadcast mechanism in distributed shared caches”

• [JSA’25] Li Wan, Zhiyuan Zhang, 傅超, Qiang Li, Jun Han. “BoostTM: Best-effort performance guarantees in best-effort hardware transactional memory for distributed manycore architectures”

• [IPDPS’24] Li Wan, 傅超, Qiang Li, Jun Han. “LockillerTM: Enhancing performance lower bounds in best-effort hardware transactional memory”

• [ASICON’23] Zengshi Wang, 傅超, Jun Han. “Coupled data prefetch and cache partitioning scheme for CPU-accelerator system”

• [MCSoC’21] Zikang Zhou, 傅超, Ruiqi Xie, Jun Han. “A Heterogeneous Full-stack AI Platform for Performance Monitoring and Hardware-specific Optimizations”